Logic simulation

"Functional simulation" redirects here. For the simulation of program functionality, see High-level emulation.

Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages.[1][2] Simulation can be performed at varying degrees of physical abstraction, such as at the transistor level, gate level, register-transfer level (RTL), electronic system-level (ESL), or behavioral level.

  1. ^ Laung-Terng Wang; Yao-Wen Chang; Kwang-Ting (Tim) Cheng (11 March 2009). Electronic Design Automation: Synthesis, Verification, and Test. Morgan Kaufmann. ISBN 978-0-08-092200-3.
  2. ^ V. Litovski; Mark Zwolinski (31 December 1996). VLSI Circuit Simulation and Optimization. Springer Science & Business Media. ISBN 978-0-412-63860-2.