General information | |
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Launched | 2017 |
Designed by | IBM |
Common manufacturer | |
Performance | |
Max. CPU clock rate | 4 GHz[1] |
Cache | |
L1 cache | 32+32 KiB per core[1] |
L2 cache | 512 KiB per core[1] |
L3 cache | 120 MiB per chip[1] |
L4 cache | via Centaur[1] |
Architecture and classification | |
Technology node | 14 nm (FinFET) |
Instruction set | Power ISA (Power ISA v.3.0) |
Physical specifications | |
Cores | |
History | |
Predecessor | POWER8 |
Successor | Power10 |
POWER, PowerPC, and Power ISA architectures |
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NXP (formerly Freescale and Motorola) |
IBM |
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IBM/Nintendo |
Other |
Related links |
Cancelled in gray, historic in italic |
POWER9 is a family of superscalar, multithreading, multi-core microprocessors produced by IBM, based on the Power ISA. It was announced in August 2016.[2] The POWER9-based processors are being manufactured using a 14 nm FinFET process,[3] in 12- and 24-core versions, for scale out and scale up applications,[3] and possibly other variations, since the POWER9 architecture is open for licensing and modification by the OpenPOWER Foundation members.[5]
Summit, the ninth fastest supercomputer in the world (based on the Top500 list as of June 2024[6]), is based on POWER9, while also using Nvidia Tesla GPUs as accelerators.[7]
nextplatform-p9
was invoked but never defined (see the help page).the Nimbus Power9 chip used in the AC922 is a single chip module that has 24 cores on the die. The Summit and Sierra machines based on the AC922 are getting 22 core versions of the chips ... IBM could later, as Power9 yields improve, add a 24 core option.