Zilog Z8000

Zilog Z8001

Z8001 on the motherboard of an Olivetti M20 computer
General information
Launched	1979; 45 years ago (1979)
Designed by	Zilog
Performance
Data width	16 bits
Address width	23 bits
Physical specifications
Transistors	17,500
Packages	48-pin DIP (8001) 40-pin DIP (8002)

The Zilog Z8000 is a 16-bit microprocessor architecture designed by Zilog and introduced in early 1979. Two chips were initially released, only differing in the width of the address bus: the Z8001 (23-bits) and Z8002 (16-bits).

The Z8000 is not Z80-compatible, but includes a number of design elements from it, such as combining two registers into one with twice the number of bits. Bernard Peuto designed the architecture, while Masatoshi Shima did the logic and physical implementation, assisted by a small group. In contrast to most designs of the era, the Z8000 does not use microcode, which allowed it to be implemented in only 17,500 transistors.

Although it saw some use in the early 1980s, it was never as popular as the Z80. It was released after the 16-bit 8086 (April 1978) and the same time as the less-expensive 8088, and only months before the 68000 (September 1979) with a 32-bit instruction set architecture and which is roughly twice as fast.

The Z80000 was a 32-bit follow-on design, that made it to a test sampling phase in 1986 without ever being released commercially.^[1]