Semiconductor device fabrication |
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MOSFET scaling (process nodes) |
Future
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The "32 nm" node is the step following the "45 nm" process in CMOS (MOSFET) semiconductor device fabrication. "32-nanometre" refers to the average half-pitch (i.e., half the distance between identical features) of a memory cell at this technology level.
Toshiba produced commercial 32 GiB NAND flash memory chips with the "32 nm" process in 2009.[1] Intel and AMD produced commercial microchips using the "32 nm" process in the early 2010s. IBM and the Common Platform also developed a "32 nm" high-κ metal gate process.[2] Intel began selling its first "32 nm" processors using the Westmere architecture on 7 January 2010.
Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit;[3] neither gate length, nor metal pitch, nor gate pitch on a "32nm" device is thirty-two nanometers.[4][5][6][7]
The "28 nm" node is an intermediate half-node die shrink based on the "32 nm" process.
The "32 nm" process was superseded by commercial "22 nm" technology in 2012.[8][9]