ARM Cortex-A76

ARM Cortex-A76
General information
Launched2018[1]
Designed byARM Holdings
Performance
Max. CPU clock rateto 3.0 GHz in phones and 3.3 GHz in tablets/laptops 
FSB speeds100  to 104 
Address width40-bit
Cache
L1 cache128 KiB (64 KiB I-cache with parity, 64 KiB D-cache) per core
L2 cache128–512 KiB per core
L3 cache512 KiB–4 MiB (optional)
Architecture and classification
MicroarchitectureARM Cortex-A76
Instruction setARMv8-A: A64, A32, and T32 (at the EL0 only)
Extensions
Physical specifications
Cores
  • 1–4 per cluster
Co-processorARM Cortex-A55 (optional)
Products, models, variants
Product code name
  • Enyo
Variant
History
PredecessorsARM Cortex-A75
ARM Cortex-A73
ARM Cortex-A72
SuccessorARM Cortex-A77

The ARM Cortex-A76 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings' Austin design centre. ARM states a 25% and 35% increase in integer and floating point performance, respectively, over a Cortex-A75 of the previous generation.[2]

  1. ^ Shrout, Ryan; Moorhead, Patrick (31 May 2018). "Ep 23 - 5/31/18 - The Future of Arm with Nandan Nayampally". The Tech Analysts Podcast. Retrieved 1 June 2018.
  2. ^ Frumusanu, Andrei (31 May 2018). "Arm Cortex-A76 CPU Unveiled". Anandtech. Retrieved 1 June 2018.