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Designer | STI (Sony, Toshiba and IBM) |
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Bits | 64-bit |
Introduced | March 2007 |
Version | PowerPC 2.02[1] |
Design | RISC |
Type | Load–store |
Encoding | Fixed/Variable (Book E) |
Branching | Condition code |
Endianness | Big/Bi |
POWER, PowerPC, and Power ISA architectures |
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NXP (formerly Freescale and Motorola) |
IBM |
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IBM/Nintendo |
Other |
Related links |
Cancelled in gray, historic in italic |
Cell is a 64-bit multi-core microprocessor microarchitecture that combines a general-purpose PowerPC core of modest performance with streamlined coprocessing elements[2] which greatly accelerate multimedia and vector processing applications, as well as many other forms of dedicated computation.[2]
It was developed by Sony, Toshiba, and IBM, an alliance known as "STI". The architectural design and first implementation were carried out at the STI Design Center in Austin, Texas over a four-year period beginning March 2001 on a budget reported by Sony as approaching US$400 million.[3] Cell is shorthand for Cell Broadband Engine Architecture, commonly abbreviated CBEA in full or Cell BE in part.
The first major commercial application of Cell was in Sony's PlayStation 3 game console, released in 2006. In May 2008, the Cell-based IBM Roadrunner supercomputer became the first TOP500 LINPACK sustained 1.0 petaflops system.[4][5] Mercury Computer Systems also developed designs based on the Cell.
The Cell architecture includes a memory coherence architecture that emphasizes power efficiency, prioritizes bandwidth over low latency, and favors peak computational throughput over the simplicity of program code. For these reasons, Cell is widely regarded as a challenging environment for software development.[6] IBM provides a Linux-based development platform to help developers program for Cell chips.[7]