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General information | |
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Launched | 1990 |
Designed by | Motorola |
Performance | |
Max. CPU clock rate | 25 MHz to 40 MHz |
Data width | 32 bits |
Address width | 32 bits |
Cache | |
L1 cache | 4096 bytes each for instruction and data with independent MMU and TLB[1] |
Architecture and classification | |
Instruction set | Motorola 68000 series |
Physical specifications | |
Transistors |
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Package | |
Products, models, variants | |
Variant |
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History | |
Predecessor | Motorola 68030 |
Successor | Motorola 68060 |
The Motorola 68040 ("sixty-eight-oh-forty") is a 32-bit microprocessor in the Motorola 68000 series, released in 1990.[2] It is the successor to the 68030 and is followed by the 68060, skipping the 68050. In keeping with general Motorola naming, the 68040 is often referred to as simply the '040 (pronounced oh-four-oh or oh-forty).
The 68040 was the first 680x0 family member with an on-chip Floating-Point Unit (FPU). It thus included all of the functionality that previously required external chips, namely the FPU and Memory Management Unit (MMU), which was added in the 68030. It also had split instruction and data caches of 4 kilobytes each. It was fully pipelined, with six stages.[3]
Versions of the 68040 were created for specific market segments, including the 68LC040, which removed the FPU, and the 68EC040, which removed both the FPU and MMU. Motorola had intended the EC variant for embedded use, but embedded processors during the 68040's time did not need the power of the 68040, so EC variants of the 68020 and 68030 continued to be common in designs.
Motorola produced several speed grades. The 16 MHz and 20 MHz parts were never qualified (XC designation) and used as prototyping samples. 25 MHz and 33 MHz grades featured across the whole line, but until around 2000 the 40 MHz grade was only for the "full" 68040. A planned 50 MHz grade was canceled after it exceeded the thermal design envelope.