 | This article needs additional citations for verification. (November 2013) |
| General information | |
|---|---|
| Launched | November 20, 2000 |
| Performance | |
| Max. CPU clock rate | 1.3 GHz to 3.8 GHz |
| FSB speeds | 100 MT/s to 1066 MT/s |
| Cache | |
| L1 cache | 8 KB to 16 KB per core |
| L2 cache | 128 KB to 4096 KB |
| L3 cache | 4 MB to 16 MB shared |
| Architecture and classification | |
| Microarchitecture | NetBurst |
| Instruction set | x86-16, IA-32, x86-64 (some) |
| Extensions | |
| Physical specifications | |
| Transistors | |
| Cores |
|
| Sockets | |
| Products, models, variants | |
| Models |
|
| History | |
| Predecessor | P6 |
| Successors | Intel Core IA-64 |
The NetBurst microarchitecture,[1][2] called P68 inside Intel, was the successor to the P6 microarchitecture in the x86 family of central processing units (CPUs) made by Intel. The first CPU to use this architecture was the Willamette-core Pentium 4, released on November 20, 2000 and the first of the Pentium 4 CPUs; all subsequent Pentium 4 and Pentium D variants have also been based on NetBurst. In mid-2001, Intel released the Foster core, which was also based on NetBurst, thus switching the Xeon CPUs to the new architecture as well. Pentium 4-based Celeron CPUs also use the NetBurst architecture.
NetBurst was replaced with the Core microarchitecture based on P6, released in July 2006.
- ^ Carmean, Doug (Spring 2002). "The Intel Pentium 4 Processor" (PDF). Intel. Archived from the original (PDF) on April 19, 2018.
- ^ "Replay: Unknown Features of the NetBurst Core". XbitLabs. March 6, 2016. Archived from the original on March 6, 2016.