Planar process

Annotated die photo of a Fairchild chip

The planar process is a manufacturing process used in the semiconductor industry to build individual components of a transistor, and in turn, connect those transistors together. It is the primary process by which silicon integrated circuit chips are built, and it is the most commonly used method of producing junctions during the manufacture of semiconductor devices.[1] The process utilizes the surface passivation and thermal oxidation methods.

The planar process was developed at Fairchild Semiconductor in 1959 and process proved to be one of the most important single advances in semiconductor technology.[1]

  1. ^ a b Butterfield, Andrew J.; Szymanski, John, eds. (2018). A Dictionary of Electronics and Electrical Engineering. Vol. 1. Oxford University Press. doi:10.1093/acref/9780198725725.001.0001. ISBN 978-0-19-872572-5.