Tagged architecture

In computer science, a tagged architecture is a type of computer architecture where every word of memory constitutes a tagged union, being divided into a number of bits of data, and a tag section that describes the type of the data: how it is to be interpreted, and, if it is a reference, the type of the object that it points to.[1][2][3]

  1. ^ The Memory Management Glossary: Tagged architecture
  2. ^ Feustel, Edward A. (July 1973). "On the Advantages of Tagged Architecture" (PDF). IEEE Transactions on Computers: 644–656. Archived (PDF) from the original on May 23, 2013. Retrieved January 21, 2013.
  3. ^ Feustel, Edward A. (1972). "The Rice Research Computer -- A tagged architecture" (PDF). Proceedings of the 1972 Spring Joint Computer Conference. American Federation of Information Processing Societies (AFIPS). pp. 369–377. Archived (PDF) from the original on September 24, 2015. Retrieved July 27, 2014.