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How to make a divider using the smallest number of transistors? On a SiGe BiCMOS process, you have to run a npn transistor at a high current to get the frequency response of which the process is capable. So I need to minimize the number of transistors to minimize the power dissipation. Also, the process uses Vcc=2.5volt max, another feature of your typical SiGe process, so there's another limitation of the number of transistors stacked.
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