Template:Infobox CPU series/doc

{{{name}}}
[[File:{{{image}}}|frameless|alt={{{alt}}}]]
{{{caption}}}
Launching{{{launching}}}
Launched{{{launched}}}
Discontinued{{{discontinued}}}
Designed by{{{designedby}}}
Manufactured by
  • {{{manuf1}}}
Fabrication process
  • {{{process1}}}
Codename(s)
  • {{{codename1}}}
Platform(s)
  • {{{platform1}}}

Branding
Brand name(s){{{branding}}}
Generation{{{generation}}}
Socket(s)
  • {{{socket1}}}

Instructions & Architecture
Instructions set{{{instructions-set}}}
Instructions{{{instructions}}}
Extensions
  • {{{extensions1}}}
Core architecture{{{core-arch}}}
P-core architecture{{{p-core-arch}}}
E-core architecture{{{e-core-arch}}}

Cores
CCD codename{{{ccd-codename}}}
Core countUp to {{{core-count}}}
Peak core clockUp to {{{peak-clock}}} {{{peakclock-unit}}}
L1 cache{{{l1-cache}}}
L2 cache{{{l2-cache}}}
L3 cache{{{l3-cache}}}
P-core L0 cache{{{p-l0-cache}}}
P-core L1 cache{{{p-l1-cache}}}
E-core L1 cache{{{e-l1-cache}}}
P-core L2 cache{{{p-l2-cache}}}
E-core L2 cache{{{e-l2-cache}}}
P-core L3 cache{{{p-l3-cache}}}
E-core L3 cache{{{e-l3-cache}}}

Graphics
Graphics architecture{{{graphics-arch}}}
Model(s)
  • {{{gpu-model1}}}
Compute UnitsUp to {{{cu-count}}} CUs
Execution UnitsUp to {{{eu-count}}} EUs
Xe CoresUp to {{{xe-count}}} Xe Cores
Peak graphics clock{{{graphics-clock}}} {{{graphics-clockunit}}}
NPU
Architecture{{{npu-arch}}}
TOPS{{{npu-tops}}}
Clock speed{{{npu-clock}}} {{{npu-clockunit}}}

Memory Support
Type{{{memory-type}}}
Memory channels{{{memory-channels}}}
Maximum capacity{{{amountmemory}}}

I/O
PCIe support{{{pcie-support}}}
PCIe lanes{{{pcie-lanes}}}
CXL support{{{cxl-support}}}
UPI links{{{upi-links}}}
DMI version{{{dmi-version}}}
HyperTransport version{{{ht-version}}}

History
Predecessor{{{predecessor}}}
Variant{{{variant}}}
Successor{{{successor}}}