VHDL

VHDL
Paradigmconcurrent, reactive, dataflow
First appeared1980s
Stable release
IEEE 1076-2019 / 23 December 2019; 4 years ago (2019-12-23)
Typing disciplinestrong
Filename extensions.vhd
WebsiteIEEE VASG
Dialects
VHDL-AMS
Influenced by
Ada,[1] Pascal
VHDL source for a signed adder

VHDL (VHSIC Hardware Description Language) is a hardware description language that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gates, for design entry, documentation, and verification purposes. The language was developed for the US military VHSIC program in the 1980s, and has been standardized by the Institute of Electrical and Electronics Engineers (IEEE) as IEEE Std 1076; the latest version of which is IEEE Std 1076-2019. To model analog and mixed-signal systems, an IEEE-standardized HDL based on VHDL called VHDL-AMS (officially IEEE 1076.1) has been developed.

  1. ^ David R. Coelho (30 June 1989). The VHDL Handbook. Springer Science & Business Media. ISBN 978-0-7923-9031-2.