Xilinx ISE

Xilinx ISE
Developer(s)Xilinx
Final release
14.7 Windows 10[1] / February 20, 2020; 4 years ago (2020-02-20)[1]
Operating systemRHEL, SLED, FreeBSD, Microsoft Windows
Size15.52 Gigabytes
Available inEnglish
TypeEDA
LicenseShareware
Websitexilinx.com/products/design-tools/ise-design-suite.html

Xilinx ISE[2] (short for Integrated Synthesis Environment)[3] is a discontinued software tool from Xilinx for synthesis and analysis of HDL designs, which primarily targets development of embedded firmware for Xilinx FPGA and CPLD integrated circuit (IC) product families. It was succeeded by Xilinx Vivado. Use of the last released edition from October 2013 continues for in-system programming of legacy hardware designs containing older FPGAs and CPLDs otherwise orphaned by the replacement design tool, Vivado Design Suite.

ISE enables the developer to synthesize ("compile") their designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the target device with the programmer. Other components shipped with the Xilinx ISE include the Embedded Development Kit (EDK), a Software Development Kit (SDK) and ChipScope Pro.[4] The Xilinx ISE is primarily used for circuit synthesis and design, while ISIM or the ModelSim logic simulator is used for system-level testing.[5][6]

As commonly practiced in the commercial electronic design automation sector, Xilinx ISE is tightly-coupled to the architecture of Xilinx's own chips (the internals of which are highly proprietary) and cannot be used with FPGA products from other vendors.[3] Given the highly proprietary nature of the Xilinx hardware product lines, it is rarely possible to use open source alternatives to tooling provided directly from Xilinx, although as of 2020, some exploratory attempts are being made.[7]

  1. ^ a b ISE Design Suite for Windows 10 - 14.7, Xilinx Downloads
  2. ^ "Foundation Series ISE 3.1i User Guide" (PDF). 100728 xilinx.com
  3. ^ a b Handbook of Networked and Embedded Control Systems, Springer Science & Business Media, 14-Nov-2007
  4. ^ Embedded Systems Design with Platform FPGAs, Morgan Kaufmann, 10-Sep-2010
  5. ^ Circuit Design with VHDL, MIT Press, 2004
  6. ^ Advances in Computer Science and Information Engineering, Springer Science & Business Media, 11-May-2012
  7. ^ Shirriff, Ken (September 2020). "Reverse-engineering the first FPGA chip, the XC2064". righto.com. self-published blog of hardcore reversing-engineering specialist. Retrieved 25 September 2020. I've determined how most of the XC2064 bitstream is configured ... and I've made a program to generate the CLB information from a bitstream file ... unfortunately, this is one of those projects where the last 20% takes most of the time, so there's still work to be done.