Designer | Zilog |
---|---|
Bits | 16-bit |
Introduced | 1979 |
Design | CISC |
Type | Register–Memory |
Branching | Condition register |
Successor | Z80000 |
Registers | |
16 × 16-bit general purpose 24-bit PC 16-bit status |
General information | |
---|---|
Launched | 1979 |
Designed by | Zilog |
Performance | |
Data width | 16 bits |
Address width | 23 bits |
Physical specifications | |
Transistors |
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Packages |
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The Zilog Z8000 is a 16-bit microprocessor designed by Zilog in early 1979.
Bernard Peuto designed the architecture, while Masatoshi Shima did the logic and physical implementation, assisted by a small group of people. In contrast to most designs of the era, the Z8000 did not use microcode, which allowed it to be implemented in only 17,500 transistors.
The Z8000 is not Z80-compatible, but includes a number of design elements from it. Among these is the ability for its registers to be combined and used as a single larger register; while the Z80 allowed two 8-bit registers to be used as a single 16-bit register, the Z8000 expanded this by allowing two 16-bit registers to operate as a 32-bit register, or four to operate as a 64-bit register. These combined registers are particularly useful for mathematical operations.
Although it saw some use in the early 1980s, it was never as popular as the Z80. It was released after the 16-bit Intel 8086 (April 1978) and the same time as the less-expensive Intel 8088, and only months before the Motorola 68000 (September 1979), which had a 32-bit instruction set architecture and was roughly twice as fast.
The Zilog Z80000 was a 32-bit follow-on design, launched in 1986.